1. Field of the Invention
The present invention relates to integrated circuit design and fabrication. More specifically, the present invention relates to a method and an apparatus to determine a process model that uses feature detection.
2. Related Art
The relentless miniaturization of integrated circuits has been a key driving force behind recent advances in computer technology. Miniaturization has been made possible by, among other things, improvements in process models. Process models can be used during a number of stages in the design and fabrication flow. For example, OPC (Optical Proximity Correction) can use process models to determine proximity corrections which can allow the system to generate the desired feature shapes on the wafer. Process model accuracy is becoming increasingly important as semiconductor integration densities continue to increase at an exponential rate.
A process model models the behavior of one or more semiconductor manufacturing processes which typically involve complex physical and chemical interactions. Since it is almost impossible to find exact analytical formulae to predict the behavior of these complex interactions, generic modeling functions may be used to model these processes.
Once these process models are found, they can be used to make corrections to layouts to compensate for undesirable effects of a semiconductor manufacturing process. Alternatively, process models can be used to predict the patterns that are formed when a layout is subjected to one or more semiconductor manufacturing processes.
The accuracy of process models usually affects the effectiveness of the applications that use the process models. Hence, it is generally desirable to improve the accuracy of process models because it can improve the effectiveness of the applications.